Clamping circuits are used to shift an ac waveform up or down by adding a de level equal to the positive or negative peak value of the ac signal. In the author’s opinion, “clamping;’ is not a particularly good term for this operation: Level shifting is more descriptive. Clamping circuits are also called dc level restorers because they are
used in systems (television, for example) where the original de level is lost in capacitor-coupled amplifier stages. It is important to recognize that the amount of de-level shift required in these applications varies as the peak value of the ac signal varies over a period of time. In other words, it is not possible to simply add a fixed
de level to the ac signal using a summing amplifier. To illustrate, the outputs required from a clamping circuit for two different inputs. Note in both cases that the peak-to-peak value of the output is the same as the peak-topeak value of the input, and that the output is shifted up (in this case) by an amount equal to the negative peak of the input.
A clamping circuit constructed from passive components. When the input first goes negative, the diode is forward biased, and the capacitor charges rapidly to the peak negative input voltage, VI’ The charging time-constantis very small because the forward resistance of the diode is small. The capacitor voltage, VI, then has the polarity shown in the figure. Assuming that the capacitor does not discharge appreciably through RL, the total load voltage as Vito begins to increase.
(Verify this equation by writing Kirchhoff’s voltage law around the loop.) Notice that the polarity of the capacitor voltage keeps the diode reverse biased, so it is like an open circuit during this time and docs not discharge the capacitor. Equation 15-13 shows that the load voltage equals the input voltage shifted up by an amount equal to VI. as required. When the input again reaches its negative peak, the capacitor may have IO recharge slightly to make up for any decay that occurred during the cycle. For proper circuit performance, the discharge time-constant, it be -than the period of the input. If the diode connections are reversed, the waveform is shifted down by an amount equal to the positive peak veltage, V2 If the diode is biased by a fixed voltage, the waveform can be shifted up or down by an amount equal to a peak value plus or minus the bias voltage.
Examples are given in the exercises at the end of the chapter. The load voltage that results’if the diode is assumed to l-ave zero voltage drop. In reality. since the capacitor charges through the diode, { 1Cvoltage across the capacitor reaches only VI minus the diode drop. Consequently,
Vi. = Vin + VI – 0.7
The waveform that results is shown in Figure 15-22(c). If the input voltage is large, this offset due to an imperfect diode can be neglected as is the case in many practical circuits. If precision clamping is required, the operational-amplifier circuit can be used. When Vin in Figure 15-23 first goes negative, the amplifier output, v,” is positive and the diode is forward biased. The capacitor quickly charges to VI. with the polarity shown. Notice that VI. = ViII + VI and that the drop across the diode.does not appear in Vi.’ With the capacitor voltage having the polarity shown, v· becomes positive, and remains positive throughout the cycle, so the amplifier output is negative. Therefore, the diode is reverse biased and the feedback loop is opened. The amplifier is driven to its maximum negative output level and the diode remains reverse biased. During one cycle of the input, the capacitor may discharge somewhat into the load, causing its voltage to fall below VI. If so, then when Vi” once again reaches its maximum negative voltage, V· will once again be negative, Uti will be positive, and the capacitor will be allowed to recharge to VI volts, as before.
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