The principal feature that distinguishes a differential amplifier from the configuration is that a signal applied to one input of a differential amplifier induces a voltage with respect to ground on the amplifier’s other output. This fact will become clear in our study of the voltage and current relations in the amplifier the basic BJT version of II differential amplifier. Two transistors an: joined at their emitter terminals, where a constant-current source is connected to supply bias current to each. The current source is typically one of the transistor con-rant-current sources that we studied in Chapter 6, but for now we will represent it by an ideal current source. Note that each transistor is basically common-emitter configuration, with an input supplied to its base and an output taken from its collector. The two base terminals are the two signal inputs to the differential amplifier, Vii and Vi2, and the two collectors are the two outputs, Vol and V.,Z. of the differential amplifier. Thus, the differential input voltage is Vii – ViZ, and the differential output voltage is V.,I – Vol’ Figure 12-3 shows the schematic symbol for the differential amplifier. Since there are two inputs and two outputs, the amplifier is said to have a double-ended (or double-sided) input and a double-ended output.
We will postpone, temporarily. our analysis of the de bias levels in the amplifier and focus 011 its behavior as a small-signal amplifier. Toward that end, we will determine the output voltage at each collector due to each input voltage acting alone, that ls.with the opposite input grounded, and then apply the superposition principle to determine the outputs due to both inputs acting simultaneously. The amplifier with input 2 grounded (v,! = 0) and a small signal applied to input 1. The ideal current source presents an infinite impedance (open circuit) to an ac signal, so we need not consider its presence in our small-signal analysis. We also assume the ideal si’uation of perfectly matched transistors, so Q, and Q2 have identical values of {3,r., etc. Since Q, is essentially a common-emitter amplifier, the voltage at its collector (v”,) is an amplified and inverted version of its input,
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Note that there is also an ac voltage Vel developed at the emitter of QI’ This voltage is in phase with Viiand exists because of emitter-follower, action across the base-emitter junction of QI.
Now, the voltage V,’Iis developed across the emitter resistance r.. looking into the emitter of Q2 (in parallel with the infinite resistance of the current source). Therefore, as far as the emitter-follower action of QI is concerned, the load resistance seen by QI is r.: Since the emitter resistance of Ql is itself r, it follows from equation 5-58 that the emitter-follower gain is 112:
Therefore, VtI is in phase with, and one-half the magnitude of, Vii’ Now, it is clear that Vtl is the emitter-to-ground voltage of both transistors. When Uti goes positive, the base-to-emitter voltage of Q2 goes negative by the Same amount. In other words, Vb<2 = Vb2 – VtI = 0 – Vtl’ (Since the base of Q2 is grounded, its base-to-emitter voltage is the same as the negative of its emitter-to-ground voltage.) We see that even though the base of Q2 is grounded, there exists an ac base-to-emitter voltage on Q2thal is out of phase with Uti and therefore out of phase with Vit. Consequently, there is an ac output voltage Vo2 produced at the collector of Q2 and it is out of phase with Vn1.
Since both transistors are identical, they have equal gain and the output Vo1 has the same magnitude as Vol’ To verify this last assertion, and to help solidify all the important ideas we have presented so far, let us study the specific example illustrated in Figure 12-5. We assume that Vii (which is the base-to-ground voltage of QI) is a 100-mV-pk sine wave, and that each transistor has voltage gain -100, where, as usual, the minus sign denotes phase inversion. By “transistor voltage gain,” we mean the collector voltage divided by the base-to-emitter voltage. Since the emitter-follower gain of Q, is 0.5, u, is a 0.5( 100 mV) = 50-m V-pk sine wave. The peak value of V,…I is therefore Vbl – VtI = (100 mY) – (50 mY) = 50 mY. When Vhtl is at this 50-mY peak, V”I is -100(50 mY) = -5 V, that is, an inverted 5-V-pk sine wave. At this same point in time, where v, is at its. 50-m V peak, the base-to-emitter voltage of 02 is 0 – (50 mV) = -50 mV pk. Therefore, V,,2 is (-100)( -50 mY) = +5 V pk; that is, V,,2 is a 5-V-pk cine wave in phase with Vii and out of phase.
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In many applications, the two inputs of a differential amplifier are driven by signals that are equal in magnitude and out of phase: Vi2 = -Vii. Continuing our analysis of the amplifier, let us now ground input 1 (Vii = 0) and assume that there is a signal applied to input 2 equal to and out of phase with the Vii signal we previously assumed. Since the transistors are identical and the circuit is completelysymmetrical, the outputs have exactly the same relationships to the jnputs as they had before: V,,2 is out of phase with Vi2 and Vol is in phase with Vi2. These relationships arc illustrated.
When we compare Figure 12-6 with Figure 12-4. we note that the Vul, outputsare identical, as are the VII2 outputs. In other words, driving the two inputs with equal but out-of-phase signals reinforces, or duplicates, the signals at the twooutputs. By superposition, each output is the sum of the voltages resulting from each input acting alone, so the outputs are exactly twice the level they would be if only one input signal were present. These ideas are summarized in Figure 12-7.In many applications, the output of a differential amplifier is taken from just one of the transistor collectors, Vol, for example. In this case the input is a difference voltage and the output is a voltage with respect to ground. This use of the amplifier is called single-ended output operation and the voltage gain in that mode.
By the superposition principle, the output V”I when botlt inputs tire applied is the of 111(‘V”I outputs due to each signa! acting alone. Likewise for V,The next example demonstrates that the single-ended output gain is one-half the difference voltage gain. To distinguish between these terms, we will hereafter refer to (V”I – vd/(vil – vd as the double-ended voltage gain.
The magnitude of the voltage gain (VJVh.) for each transistor in Figure 12-2 is 100. If Vii and Vi~ are out-of-phase, l00-mV-pk signals applied simultaneously to the inputs, find .
1. the peak values of V”I and V,,2;
2. the magnitude of the double-ended voltage gain (V”I – v,,~)/(vii – v,~); and
3. the magnitude of the single-ended output gain v”I/(Vil – v,!).
Solution
1. As demonstrated in Figure 12-5. the peak value of each output is 5 V when one input is driven and the other is grounded. Since the outputs are doubled when the inputs are equal and out of phase. each output is \0 V pk.
2. Since v” = ‘:”‘Vi: the input difference voltage is v” – Vi = 2v” = 200 mV pk. Similarly, V”I = -V”l, so the output difference voltage is V,.I – v,,! = 2v,,1 = 20 V pk. Therefore. the magnitude of (V”I – V,d/(Vil – va) is (20 V)/(200 mY) = I (X).
3. The magnitude of the ‘single-ended output gain
Since V”I is out of phase with (Vii – Vi2). the correct specification for the singleend output gain is -50. If the single-ended output is taken from the other side (u,d. which is out of phase with V”I. then the gain v.Jt»; – v,!) is +50 .
Note once again that the double-ended voltage gain is the same as the voltage gain v.lvI>,’ for each transistor. Note also thttt the single-ended output gain is one-half tlu: double-ended guin. Since the output difference voltage V,>I – V,.2 is out of phase with the input difference voltage Vol – V,!, the correct specification for the doubleended voltage gain is -100.
It should now be clear that if the two inputs arc driven hy equal in-phase signals, the output at each collector will be exactly 0, and the output difference voltage will be n. Of course, in this case, the input difference ,”vI! ,Ig.: is also O. These ideas are illustrated in Figure 12-8. We can now derive general t”.pH’ ~~i,JOsfor the double-ended and single-ended output voltage gains in terms of the circuit parameters. Figure 12-9 shows one side of the differential amplifier with the other side replaced by its emitter resistance.This is the resistance in series with the emitter of QI when the input to C)~ i<;grounded. We arc again assuming that the current source has infinite.
Neglecting the output resistance r; at the collector of QI, we can use the familiar approximation for the voltage gain of the transistor:
where the quantity 21′” is in the denominator because we assume that the emitter resistances of QI and Q~are equal. Equations 12-3 and 12-4 confirm our previous conclusion that the transistor voltage gain is twice the value of the gain V”I/Vil’.