SMALL-SIGNAL PERFORMANCE OF THE BIAS-STABILIZED CIRCUIT

Figure 6-t a) shows the bias-stabilized circuit incorporated into an ac amplifier stage. Both source resistance and load resistance are included. Figure 6-6(b) shows the ac equivalent circuit. of the amplifier. Note that RI and R1 are both connected to ac ground and are therefore in parallel as far as ac signals are concerned. These
are combined into RIJ = R, II R2 in the ac equivalent circuit. The total resistance from collector to ground is the parallel combination of the transistor output resistance r the collector resistor Re, and the load resistor R, : r, = r; II Rc II R ” = Rc II R “!n Fig 6-G(b), + mvj – y ~bols are used to show ins accountants polarities and to emphasize the fact that the ac emitter voltage u., is in phase with i’I>< and 1 that Art is 1800 out of phase with v~. It can be seen in the figure that v,. (which is also out of phase with u) is (6-19) The significance of equation 6-19 is that he ac load voltage is reduced by the amount Vf from what it would otherwise be if Rt: were not present. This reduction in load voltage due to RE is called degeneration. Using the sane dire /nation that was used to show that the voltage gain Au equals RD. when the only resistance in the emitter circuit was re v we can show that the voltage gain when the emitter circuit resistance is r, + Rr: is given by A u r, + RE (6-20) Since the denominator in equation 6-20 now includes RE, it is clear that the voltage gain is considerably smaller than it would be if R” were O. Thus, equation 6-20 shows the extent to which gain is reduced by degeneration. In most practical circuits, R£ » r., so a good approximation for the voltage gain is (6-21) While it is desirable for R£ to be as large as possible to achieve good bias stability, we see that large values of R,; reduce the amplifier voltage gain. The fact
that voltage gain must be sacrificed for bias stability, or vice versa, is a good illustration of the trade-off principle that underlies all electronic design problems: It is inevitably necessary to·trade one desirable feature for another. In other words, the improvement of one aspect of a circuit’s performance is achieved only at the expense of another aspect. The art of electronic circuit design is the ability to make reasonable compromises that satisfy all the requirements of a given application. One desirable implication of equation 6-21 is that it makes the ac voltage gain essentially independent of the transistor parameter r., and thus independent of the transistor used in the circuit as well as its bias point. Note that A. now depends only o« e. external resistor values: Au ” =ri! RF. = -(Rc II RL)I RE• Thus, by sacrificing the magnitude of the voltage gain, we achieve predictability. In some applications.it may be far more important to have an amplifier whose voltage gain will only vary from. say, 9.5 to 10.5 when different transistors are used than it would be to have a large gain that could vary from 90 to 200 One way to retain the desirable effect of RE on bias stability and still achieve a large voltage gain is to connect a capacitor in parallel with RE, as shown in Figure 6-7. The capacitor should be large enough to have an impedance that is negligible in comparison to RE at all frequencies of the ac signal. When this is the case, the emitter is at ac ground because the ac resistance in the emitter circuit is again simply r., The capacitor effectively “shorts out” R£ for ac signals, and it is called an emitter bypass capacitor, because it bypasses ac signals around RE to ground. Note that tile ed input resistance at the base is still R; “‘” (R, because the capacitor is an open circuit to , and bias stabilization is therefore maintained. Let us now consider the effect of the voltage-divider resistors RI and R2 in Figure 6-6(a) on the ac performance of the amplifier. As shown in Figure 6-6(b), the parallel combination RI II R2 = Ro appears between base and ground as far as ac signals are concerned. St therefore reduces the overall input resistance to the amplifier stage. as shown by equations 6-22 and 6-23: 1 The emitter bypass capacitor effectively connects the emitter 10 ac ground. As usual, TS and (stage) form a voltage divider across the input of the amplifier, Therefore, the reduction in (stage) caused by the presence of RB reduces the overall voltage gain of the amplifier. Note that R8 also reduces the overall current gain, because it provides a path to ground for some of the ac input current that would otherwise enter the base. Clearly, R; and R2 should both be as large as possible to prevent a serious deterioration in gain. Since it is desirable to have RB small from the standpoint of bias stability, we see that there is again a trade-off
between stability and gain. Equations 6-24 summarize the equations used to determine bias conditions and ac performance of the bias-stabilized CE amplifier.

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