Suppose we wish to produce an output voltage that equals the mathematical difference two input signals, This operation can be pcrtunned by using the -ampli dijfercntiol moue, where the signals arc connected through appropriate resistor networks to the inverting and noninverting terminals. Figure 14-5 shows the configuration. We can use the superpo ition principle to determine the output of this circuit. First, assume that V2 is shorted to ground. Then
Assuming now that VI is shorted to ground, we have
Equation 14-12 shows that the output is proportional to the difference between scaled multiples of the inputs. To obtain the output
where A is a fixed constant, select the resistor values in accordance with the following:
But the quantity R2/(RI + R2) is always less than 1. Therefore, equation 14-18 shows that in order to use the circuit of Figure 14-5 to produce V” = (IIVI – (I2V!, we must have
Design an operational-amplifier circuit that will produce the output V” =O.Su, – 2V2.
Solution. Note that (I) = 0.5 and (12 = 2, so (1 + (12) > (I). Therefore, it is possible to construct a circuit in the configuration of Figure 14-5. Comparing u” with equation 14-12, we see that we must have
In Example 14-2, we note that the compensation resistance (RI II Rz = (100 kD) II (20 kH) = 1(1.07 kO) is not equal to its optimum value (R.l1I R4 = (50 kH) II (100 kO) = 33.:n Ul). With some algebraic complication, we can impose the additional condition NI IIR, = R.lII R4 and thereby force the compensation resistance to have its optimum value. With u” = alUI – aZU2, it can be shown (Exercise 14-8) that the compensation resistance (R, II Rz) is optimum when the resistor values are selected in accordance with
R4 = a2 RI = a2R.I = Rz{l + a2 -a1)
To apply this design criterion, choose R4 and solve for RI, R2, and R,. In Example 14-?, {II = 0.5 and {/2 = 2. If we choose R4 = 100 kfl, then RI = (100 kfl)/0.5 = 200 kfl, R2 = (100 kfl)/2.S = 40 kD., and R3 = (100 kO)/2 = 50 kfl. These choices give R, II u, = 333 kfl = R, II R4• as required.
Although the circuit of Figure 14-5 is a useful and economical way to obtain a difference voltage of the form A(u, – U2), our analysis has shown that it has limitations and complications when we want (0 produce an output of the general form u” = alul – aZU2. An alternate way to obtain a scaled difference between two signal inputs is to use two inverting amplifiers, as shown in Figure 14-7. The output of the first amplifier is
Design an upcrationnl-amplilicr circuit using two inverting configurations to produce the output v” = 20vI – {).2v~. (Note that I + {/~= 1.2 < 20 = (fl. so we cannot use the differential circuit of figure 14-5.)
Solution. We have so many choices for resistance values that the best approach is to implement the circuit directly, without bothering to use the algebra. 14-20. We can, for example. begin the process by designing the first amplifier to produce -20ul’ Choose R, = 10 kH and R~ = 20() kil. Then, the second amplifier need only invert -20v, with unity gain and scale the V2 input by 0.2. Choose R, = 20 kf]. Then Rs/ R-, = 1 => RJ = 20 kil and Rs/ R4 = 0.2 => R4 = 100 kil. he completed design is shown in Figure 14-8(a). figure l4-8(b) shows another solution. in which the first amplifier produces -l()v, and the second multiplies that
Although there are a large number of ways to choose resistor values to satisfy equation 14·-21, there may, in practice, be constraints on some of those choices imposed by’ other performance requirements. For example, RI may hay> to be a certain minimum value to provide adequate input resistance to the VI signal source. Recall, also, that the greater the closed-loop gain of a stage, the smaller its bandwidth. Thus it may be necessary to “distribute” gain over two stages, as is done in Figure14-8(b) to obtain 20u!, in order to increase the overall bandwidth. Finally, it may be necessary to minimize the gain of one stage or the other to reduce the effect of its input offset voltage. Note that the input offset voltage of the first stage is amplified by both stages.
The method used to design a subtractor circuit in Example 14-3 can be extended in an obvious way to the design of circuits that produce a linear combination of voltage sums and differences. The most general form of a linear combination is V” = ±alv\ ± a2u2’± a3VJ ± . ‘.. ± aI/v”. Remember that the input signal corresponding to any term that appears in the output with a positive sign must pass through two inverting stages.
1. Design an operational-amplifier circuit ‘using two inverting configurations to produce the output Vo”7 -lOUl + 5U2 + 0.5U3 ‘- 20U4’ ,
2. Assuming that the unity-gain frequency of each amplifier is 1 MHz, find the approximate, overall, closed-loop bandwidth of your solution.
Solution
1. Since U2 and U3 appear with positive signs in the output, those two inputs must be connecreu tothe.firs] inverting amplifier. We can produce -(5v2 + O.5vJ) the output of the first inverting amplifier and then invert and add it to’ -(IOul + 20V4) in the second amplifier. One possible solution is shown in Figure 14-9.
2. The feedback ratio of the first amplifier is
